Artificial Intelligence Hardware Architect (Senior Hardware Architect)

Role/Responsibilities:

EnCharge AI is looking for a senior hardware architect, who can lead the definition of the architecture & microarchitecture for critical blocks of our high-performance AI chips. You must have experience in defining architectures for high-performance chips and a successful track record of enabling HW-SW codesign in prior roles.

• Collaborate with the AI Algorithms & Compiler teams to lead the microarchitectural definition (and detailed specifications) for primary AI chip blocks.
• Helping build chip-simulators, performance models, assemblers, and disassemblers for new architectures.
• Work closely with the AI compiler and FPGA platform teams to optimize the instruction-set & microarchitectures - with the objective of enhancing chip & system level performance (and power efficiency) for AI applications.
• Mapping key AI application kernels on to EnCharge AI chips / simulators etc. to help refine and optimize chip microarchitectures
• Mentor / lead junior engineers across the company.

Qualifications/Required Skills:

• Computer architecture, system design and chip design
• Masters/Ph.D. in EE/CS with >5 years of industry experience in chip-design, architecture & systems.
• Experience with large-scale FPGA platforms (e.g., Synopsys Zebu or Cadence Palladium).
• Solid understanding and evaluation of performance bottlenecks in AI architectures.
• Experience with building performance models and simulators for new architectures.
• Knowledge of industry-standard (and advanced) tools and methodologies.
• Proficiency with System-C / RTL (VHDL or Verilog) / C++ / Python.
• Excellent verbal and communication skills. 

Preferred/Beneficial Skills:

• Experience with PCIe, DMA engines and chip-level infrastructures.